*
* Acronym |
* Description |
*
*
* DFLL |
* Digital Frequency Locked Loop |
*
*
* MUX |
* Multiplexer |
*
*
* MCLK |
* Main Clock |
*
*
* OSC32K |
* Internal 32KHz Oscillator |
*
*
* OSC16M |
* Internal 16MHz Oscillator |
*
*
* PLL |
* Phase Locked Loop |
*
*
* OSC |
* Oscillator |
*
*
* XOSC |
* External Oscillator |
*
*
* XOSC32K |
* External 32KHz Oscillator |
*
*
* AHB |
* Advanced High-performance Bus |
*
*
* APB |
* Advanced Peripheral Bus |
*
*
* DPLL |
* Digital Phase Locked Loop |
*
*
*
*
* \section asfdoc_sam0_system_clock_extra_dependencies Dependencies
* This driver has the following dependencies:
*
* - None
*
*
* \section asfdoc_sam0_system_clock_extra_errata Errata
*
* - This driver implements experimental workaround for errata 9905
*
* "The DFLL clock must be requested before being configured. Otherwise a
* write access to a DFLL register can freeze the device."
* This driver will enable and configure the DFLL before the ONDEMAND bit is set.
*
*
* \section asfdoc_sam0_system_clock_extra_history Module History
* An overview of the module history is presented in the table below, with
* details on the enhancements and fixes made to the module since its first
* release. The current version of this corresponds to the newest version in
* the table.
*
*