ADF7030-1 Device Drivers API Reference Manual
Alpha 0.0.1
Device Drivers for ADF7030-1 Transceiver
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IRQ Control Register (IRQ_CTRL) More...
#include <__public__ADF7030_1_hw_cdef.h>
Data Fields | |
union { | |
__IO uint32_t MASK [2] | |
struct { | |
uint32_t __pad0__: 8 | |
__IO uint32_t BUFF_FULL_IRQN: 1 | |
__IO uint32_t BUFF_HALF_IRQN: 1 | |
__IO uint32_t SM_IDLE_IRQN: 1 | |
__IO uint32_t SM_READY_IRQN: 1 | |
} MASK_b [2] | |
}; | |
union { | |
__IO uint32_t STATUS [2] | |
struct { | |
__IO uint32_t BUFF_FULL_IRQN: 1 | |
__IO uint32_t BUFF_HALF_IRQN: 1 | |
__IO uint32_t CRC_CHK_IRQN: 1 | |
__IO uint32_t EOF_IRQN: 1 | |
__IO uint32_t LENGTH_IRQN: 1 | |
__IO uint32_t PAYLOAD_BLOC_IRQN: 1 | |
__IO uint32_t PAYLOAD_IRQN: 1 | |
__IO uint32_t PREAMBLE_GONE_IRQN: 1 | |
__IO uint32_t PREAMBLE_IRQN: 1 | |
__IO uint32_t SM_IDLE_IRQN: 1 | |
__IO uint32_t SM_READY_IRQN: 1 | |
__IO uint32_t SYNCWORD_IRQN: 1 | |
} STATUS_b [2] | |
}; | |
IRQ Control Register (IRQ_CTRL)
Definition at line 127 of file __public__ADF7030_1_hw_cdef.h.
union { ... } |
< IRQ_CTRL Structure
__IO uint32_t BUFF_FULL_IRQN |
Rx: the upper half of Rx rolling buffer is full. Tx: the upper half of Tx rolling buffer is empty (write 1 to clear event).
RX: the upper half of Rx rolling buffer is full. Tx: the upper half of Tx rolling buffer is empty (write 1 to clear event).
Definition at line 136 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t BUFF_HALF_IRQN |
Rx: the lower half of Rx rolling buffer is full. Tx: the lower half of Tx rolling buffer is empty (write 1 to clear event).
RX: the lower half of Rx rolling buffer is full. Tx: the lower half of Tx rolling buffer is empty write 1 to clear).
Definition at line 134 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t CRC_CHK_IRQN |
Generic packet and IEEE802.15.4g: The programmed number of CRC/FCS bits has been received and are correct (Rx); the programmed number of CRC/FCS bits have been transmitted (Tx).
Definition at line 174 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t EOF_IRQN |
Generic packet and IEEE802.15.4g: the full packet has been received (RX)/The full packet has been transmitted (Tx)
Definition at line 177 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t LENGTH_IRQN |
Generic packet: a length field has been received (Rx); the length field has been transmitted (Tx). IEEE802.15.4g: PHR has been received (Rx); the PHR has been transmitted (Tx).
Definition at line 165 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t MASK[2] |
Masks for IRQ_OUTx
Definition at line 130 of file __public__ADF7030_1_hw_cdef.h.
struct { ... } MASK_b[2] |
BitSize
__IO uint32_t PAYLOAD_BLOC_IRQN |
Generic packet only: A multiple of TRX_BLOCK_SIZE payload bytes have been received (Rx); a multiple of TRX_BLOCK_SIZE payload bytes have been transmitted (Tx).
Definition at line 171 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t PAYLOAD_IRQN |
Generic packet: full payload received (Rx)/full payload transmitted (Tx). IEEE802.15.4g: full Payload (including FCS) received (Rx); full payload (including FCS) transmitted (Tx).
Definition at line 168 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t PREAMBLE_GONE_IRQN |
Generic packet and IEEE802.15.4g: preamble pattern no longer being received in received bit stream (Rx); last preamble bit transmitted (Tx).
Definition at line 156 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t PREAMBLE_IRQN |
Generic packet and IEEE802.15.4g: preamble has been received (Rx); the first preamble bit is about to be transmitted (Tx).
Definition at line 154 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t SM_IDLE_IRQN |
SM_IDLE event has occurred. The destination state has been reached and all actions associated with the destination state have been completed. The complete state transition is complete (write 1 to clear).
SM_IDLE Event has occurred. The destination state has been reached and all actions associated with the destination state have been completed. The complete state transition is complete, write 1 to clear.
Definition at line 143 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t SM_READY_IRQN |
SM_RDY event has occurred. The last state transition command has been received and the transition from the origin state to destination state is underway. A new command can be issued at this point to interrupt the current transition. It indicates that CMD_READY is 1 (write 1 to clear).
SM_RDY Event has occurred. The last state transition command has been received and the transition from the origin state to destination state is underway. A new command may be issued at this point to interrupt the current transition. It indicates that CMD_READY is 1, write 1 to clear.
Definition at line 138 of file __public__ADF7030_1_hw_cdef.h.
__IO uint32_t STATUS[2] |
Status of IRQ_OUTx
Definition at line 151 of file __public__ADF7030_1_hw_cdef.h.
struct { ... } STATUS_b[2] |
BitSize
__IO uint32_t SYNCWORD_IRQN |
Generic packet: the programmed number of bits of Syncword 0 have been received and matched (Rx). IEEE802.15.4g: the programmed number of Syncword 0 or Syncword 1 (if enabled) bits have been received and matched (Rx). Generic packet and IEEE802.15.4g: the programmed number of bits of Syncword 0 have been transmitted (Tx).
Definition at line 159 of file __public__ADF7030_1_hw_cdef.h.