ADF7030-1 Device Drivers API Reference Manual  Alpha 0.0.1
Device Drivers for ADF7030-1 Transceiver
ADI_GENERIC_PKT_Type Struct Reference

Generic Packet Configuration (GENERIC_PKT) More...

#include <__public__ADF7030_1_fw_cdef.h>

Data Fields

union {
   uint32_t   BUFF_CFG0
 
   struct {
      uint32_t   __pad0__: 1
 
      uint32_t   BIT2AIR: 1
 
      uint32_t   PTR_RX_BASE: 11
 
      uint32_t   PTR_TX_BASE: 11
 
      uint32_t   ROLLING_BUFF_EN: 1
 
   }   BUFF_CFG0_b
 
}; 
 
union {
   uint32_t   BUFF_CFG1
 
   struct {
      uint32_t   __pad0__: 1
 
      uint32_t   __pad1__: 1
 
      uint32_t   __pad2__: 1
 
      uint32_t   RX_SIZE: 9
 
      uint32_t   TRX_BLOCK_SIZE: 8
 
      uint32_t   TURNAROUND_RX: 1
 
      uint32_t   TURNAROUND_TX: 1
 
      uint32_t   TX_BUFF_RAWDATA: 1
 
      uint32_t   TX_SIZE: 9
 
   }   BUFF_CFG1_b
 
}; 
 
union {
   uint32_t   FRAME_CFG0
 
   struct {
      uint32_t   __pad0__: 8
 
      uint32_t   __pad1__: 2
 
      uint32_t   CRC_LEN: 6
 
      uint32_t   PREAMBLE_LEN: 8
 
      uint32_t   SYNC0_LEN: 6
 
   }   FRAME_CFG0_b
 
}; 
 
union {
   uint32_t   FRAME_CFG1
 
   struct {
      uint32_t   __pad0__: 3
 
      uint32_t   PAYLOAD_SIZE: 12
 
      uint32_t   PREAMBLE_UNIT: 1
 
      uint32_t   TRX_IRQ0_TYPE: 8
 
      uint32_t   TRX_IRQ1_TYPE: 8
 
   }   FRAME_CFG1_b
 
}; 
 
union {
   uint32_t   FRAME_CFG2
 
   struct {
      uint32_t   __pad0__: 3
 
      uint32_t   __pad1__: 2
 
      uint32_t   __pad2__: 2
 
      uint32_t   CRC_SHIFT_IN_ZEROS: 1
 
      uint32_t   ENDEC_MODE: 8
 
      uint32_t   LEN_SEL: 2
 
      uint32_t   PREAMBLE_VAL: 8
 
      uint32_t   SYNC1_LEN: 6
 
   }   FRAME_CFG2_b
 
}; 
 
union {
   uint32_t   FRAME_CFG3
 
   struct {
      uint32_t   __pad0__: 16
 
      uint32_t   RX_LENGTH: 16
 
   }   FRAME_CFG3_b
 
}; 
 
union {
   uint32_t   FRAME_CFG5
 
   struct {
      uint32_t   TX_PHR: 16
 
   }   FRAME_CFG5_b
 
}; 
 
union {
   uint32_t   LIVE_LINK_QUAL
 
   struct {
      uint32_t   __pad0__: 16
 
      uint32_t   RSSI: 11
 
   }   LIVE_LINK_QUAL_b
 
}; 
 
union {
   uint32_t   LPM_CFG
 
   struct {
      uint32_t   __pad0__: 8
 
      uint32_t   PREAMBLE_DETECT_DWELL_TIME: 8
 
      uint32_t   PREAMBLE_DWELL_TIME: 8
 
      uint32_t   PREAMBLE_QUAL_DWELL_TIME: 8
 
   }   LPM_CFG_b
 
}; 
 
union {
   uint32_t   TEST_MODES0
 
   struct {
      uint32_t   __pad0__: 16
 
      uint32_t   TX_TEST: 4
 
   }   TEST_MODES0_b
 
}; 
 
union {
   uint32_t   LCPSM1
 
   struct {
      uint32_t   LCPSM_ENERGY_CNT: 16
 
      uint32_t   LCPSM_LOW_CNT: 16
 
   }   LCPSM1_b
 
}; 
 
union {
   uint32_t   LCPSM2
 
   struct {
      uint32_t   __pad0__: 15
 
      uint32_t   LCPSM_AFC_THRESHOLD: 16
 
      uint32_t   LCPSM_ENABLED: 1
 
   }   LCPSM2_b
 
}; 
 
uint32_t CRC_FINAL_XOR
 
uint32_t CRC_POLY
 
uint32_t CRC_SEED
 
uint32_t LCPSM3
 
uint32_t MISC0
 
uint32_t MISC1
 
uint32_t MISC2
 
uint32_t SYNCWORD0
 
uint32_t SYNCWORD1
 

Detailed Description

Generic Packet Configuration (GENERIC_PKT)

Definition at line 284 of file __public__ADF7030_1_fw_cdef.h.

Field Documentation

union { ... }

< GENERIC_PKT Structure

uint32_t BIT2AIR

For generic packet format Tx: specifies which bit of payload bytes is Tx first (0 = most significant bit (MSB) first). For generic packet format Rx: specifies into which bit the first bit received of payload is written (0 = MSB)

Definition at line 294 of file __public__ADF7030_1_fw_cdef.h.

uint32_t BUFF_CFG0

Transmit/Receive Buffer Configuration 0

Definition at line 287 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } BUFF_CFG0_b

BitSize

uint32_t BUFF_CFG1

Transmit/Receive Buffer Configuration 1

Definition at line 307 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } BUFF_CFG1_b

BitSize

uint32_t CRC_FINAL_XOR

CRC XOR value

Definition at line 403 of file __public__ADF7030_1_fw_cdef.h.

uint32_t CRC_LEN

Generic packet: CRC length used in Rx and Tx. IEEE802.15.4g: FCS length used in Tx only; Rx FCS length inferred from received PHR.

Definition at line 338 of file __public__ADF7030_1_fw_cdef.h.

uint32_t CRC_POLY

CRC polynomial

Definition at line 401 of file __public__ADF7030_1_fw_cdef.h.

uint32_t CRC_SEED

CRC initial seed

Definition at line 402 of file __public__ADF7030_1_fw_cdef.h.

uint32_t CRC_SHIFT_IN_ZEROS

Shift in CRC length of zeros after all bytes have passed through CRC calculation. Determines whether the final register value is reversed

Definition at line 366 of file __public__ADF7030_1_fw_cdef.h.

uint32_t ENDEC_MODE

Line coding scheme (generic packet Tx only)

Definition at line 376 of file __public__ADF7030_1_fw_cdef.h.

uint32_t FRAME_CFG0

Generic Packet Frame Configuration 0

Definition at line 330 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } FRAME_CFG0_b

BitSize

uint32_t FRAME_CFG1

Generic Packet Frame Configuration 1

Definition at line 345 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } FRAME_CFG1_b

BitSize

uint32_t FRAME_CFG2

Generic Packet Frame Configuration 2

Definition at line 359 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } FRAME_CFG2_b

BitSize

uint32_t FRAME_CFG3

Generic Packet Frame Configuration 3

Definition at line 381 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } FRAME_CFG3_b

BitSize

uint32_t FRAME_CFG5

Generic Packet Frame Configuration 5

Definition at line 392 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } FRAME_CFG5_b

BitSize

uint32_t LCPSM1

Low Current Packet Search Mode Configuration 1

Definition at line 440 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } LCPSM1_b

BitSize

uint32_t LCPSM2

Low Current Packet Search Mode Configuration 2

Definition at line 451 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } LCPSM2_b

BitSize

uint32_t LCPSM3

Low Current Packet Search Mode Configuration 3

Definition at line 462 of file __public__ADF7030_1_fw_cdef.h.

uint32_t LCPSM_AFC_THRESHOLD

AFC threshold to use while in LCPSM energy detection phase

Definition at line 454 of file __public__ADF7030_1_fw_cdef.h.

uint32_t LCPSM_ENABLED

Indicate whether LCPSM is enabled or not. Note that this bit only gets set on entry into PHY_RX when LCPSM is enabled. When disabling LCPSM, this bit should be updated immediately.

Definition at line 456 of file __public__ADF7030_1_fw_cdef.h.

uint32_t LCPSM_ENERGY_CNT

Number of samples of energy to take during LCPSM energy detection phase

Definition at line 443 of file __public__ADF7030_1_fw_cdef.h.

uint32_t LCPSM_LOW_CNT

Number of SERDES interrupts to to remain in LCPSM idle state for

Definition at line 445 of file __public__ADF7030_1_fw_cdef.h.

uint32_t LEN_SEL

Selects the size of the length field in the received or transmitted message (Rx and Tx generic packet only)

Definition at line 369 of file __public__ADF7030_1_fw_cdef.h.

uint32_t LIVE_LINK_QUAL

RX link quality readback

Definition at line 407 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } LIVE_LINK_QUAL_b

BitSize

uint32_t LPM_CFG

Low Power Mode Configuration

Definition at line 419 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } LPM_CFG_b

BitSize

uint32_t MISC0

Miscellaneous register 0

Definition at line 415 of file __public__ADF7030_1_fw_cdef.h.

uint32_t MISC1

Miscellaneous register 1

Definition at line 416 of file __public__ADF7030_1_fw_cdef.h.

uint32_t MISC2

MISC2 Register

Definition at line 461 of file __public__ADF7030_1_fw_cdef.h.

uint32_t PAYLOAD_SIZE

Generic packet only: sets number of payload bytes in the Tx packet (Raw mode only). Sets the number of payload bytes that are received in the incoming packet payload (Rx raw mode only).

Definition at line 348 of file __public__ADF7030_1_fw_cdef.h.

uint32_t PREAMBLE_DETECT_DWELL_TIME

Number of symbols allowed for RSSI qualification

Definition at line 425 of file __public__ADF7030_1_fw_cdef.h.

uint32_t PREAMBLE_DWELL_TIME

Number of symbols allowed for start of syncword

Definition at line 423 of file __public__ADF7030_1_fw_cdef.h.

uint32_t PREAMBLE_LEN

Number of units of preamble at start of Tx packet (TX only); see also PREAMBLE_UNIT

Definition at line 333 of file __public__ADF7030_1_fw_cdef.h.

uint32_t PREAMBLE_QUAL_DWELL_TIME

Number of symbols allowed for AFC qualification

Definition at line 424 of file __public__ADF7030_1_fw_cdef.h.

uint32_t PREAMBLE_UNIT

Unit of preamble length for Tx

Definition at line 351 of file __public__ADF7030_1_fw_cdef.h.

uint32_t PREAMBLE_VAL

For Tx this is the preamble pattern used in the outgoing packet. For Rx, this must be set to the expected preamble, e.g. 0x55 or 0xAA. If this field is set to 0 a default value of 0x55 is used.

Definition at line 372 of file __public__ADF7030_1_fw_cdef.h.

uint32_t PTR_RX_BASE

Rx base buffer offset pointer. The base address of the Rx payload is 0x2000000 + (PTR_RX_BASE x 4)

Definition at line 290 of file __public__ADF7030_1_fw_cdef.h.

uint32_t PTR_TX_BASE

Tx base buffer offset pointer. The base address of the Tx payload is 0x2000000 + (PTR_TX_BASE x 4)

Definition at line 292 of file __public__ADF7030_1_fw_cdef.h.

uint32_t ROLLING_BUFF_EN

Enable the rolling buffer mode. When the number of bytes received equals RX_SIZE/2 or TX_SIZE/2, the half full IRQ is asserted. When number of bytes received equals RX_SIZE or TX_SIZE, the full IRQ is asserted.

Definition at line 299 of file __public__ADF7030_1_fw_cdef.h.

uint32_t RSSI

RSSI as a signed 11-bit value in units of 0.25 dBm measured during packet reception

Definition at line 411 of file __public__ADF7030_1_fw_cdef.h.

uint32_t RX_LENGTH

Generic packet Rx: The contents of the length field in the received packet. IEEE802.15.4g: the received PHR.

Definition at line 385 of file __public__ADF7030_1_fw_cdef.h.

uint32_t RX_SIZE

Maximum size of the Rx buffer.

Definition at line 310 of file __public__ADF7030_1_fw_cdef.h.

uint32_t SYNC0_LEN

Length of the Syncword 0 in bits (Rx and Tx)

Definition at line 336 of file __public__ADF7030_1_fw_cdef.h.

uint32_t SYNC1_LEN

Length of the Syncword 1 in bits. Only used in IEEE802.15.4g Rx

Definition at line 363 of file __public__ADF7030_1_fw_cdef.h.

uint32_t SYNCWORD0

Sync Word 0

Definition at line 399 of file __public__ADF7030_1_fw_cdef.h.

uint32_t SYNCWORD1

Sync Word 1

Definition at line 400 of file __public__ADF7030_1_fw_cdef.h.

uint32_t TEST_MODES0

Test Mode Configuration 0

Definition at line 430 of file __public__ADF7030_1_fw_cdef.h.

struct { ... } TEST_MODES0_b

BitSize

uint32_t TRX_BLOCK_SIZE

Set the multiple of bytes for which the PAYLOAD_BLOC_IRQ interrupt is asserted during packet reception or transmission (not used for IEEE802.15.4g). e.g. Set to 4 to cause an IRQ every 4 bytes.

Definition at line 315 of file __public__ADF7030_1_fw_cdef.h.

uint32_t TRX_IRQ0_TYPE

Select sources of interrupt on IRQ_OUT0 during Rx and Tx

Definition at line 353 of file __public__ADF7030_1_fw_cdef.h.

uint32_t TRX_IRQ1_TYPE

Select sources of interrupt on IRQ_OUT1 during Rx & Tx

Definition at line 354 of file __public__ADF7030_1_fw_cdef.h.

uint32_t TURNAROUND_RX

Enable automatic PHY_RX to PHY_TX transition on completion of packet reception if packet with correct CRC (if CRC enabled)

Definition at line 321 of file __public__ADF7030_1_fw_cdef.h.

uint32_t TURNAROUND_TX

Enable automatic PHY_TX to PHY_RX transition on completion of packet transmission

Definition at line 324 of file __public__ADF7030_1_fw_cdef.h.

uint32_t TX_BUFF_RAWDATA

Transmit only the payload

Definition at line 319 of file __public__ADF7030_1_fw_cdef.h.

uint32_t TX_PHR

PHY Header (PHR) used as first two octets of IEEE802.15.4g Tx packet

Definition at line 395 of file __public__ADF7030_1_fw_cdef.h.

uint32_t TX_SIZE

Maximum size of the Tx buffer in octets. In nonrolling buffer mode, the ADF7030-1 does not transmit data written beyond the buffer delimited by this size. In rolling buffer mode, this is the size of the Tx buffer.

Definition at line 311 of file __public__ADF7030_1_fw_cdef.h.

uint32_t TX_TEST

Continuous Tx test modes

Definition at line 434 of file __public__ADF7030_1_fw_cdef.h.