ADF7030-1 Device Drivers API Reference Manual  Alpha 0.0.1
Device Drivers for ADF7030-1 Transceiver
adf7030-1__mem.c
1 /*********************************************************************************
2 
3 Copyright(c) 2016 Analog Devices, Inc. All Rights Reserved.
4 
5 This software is proprietary and confidential. By using this software you agree
6 to the terms of the associated Analog Devices License Agreement.
7 
8 *********************************************************************************/
28 #ifndef _ADF7030_1__SPI_C_
29 
30 #define _ADF7030_1__SPI_C_
31 
32 #include <stddef.h>
33 #include <string.h>
34 #include <assert.h>
35 #include "system.h"
36 #include "common.h"
37 
38 #include <drivers/spi/adi_spi.h>
39 //#include <devices/rf/adf703x/adi_adf7030-1.h>
40 //#include <devices/rf/adf703x/adi_adf7030-1_reg.h>
41 #include <devices/rf/adf703x/adf7030-1__spi.h>
42 #include <devices/rf/adf703x/adf7030-1__mem.h>
43 
44 
45 #ifdef __ICCARM__
46 /*
47 * IAR MISRA C 2004 error suppressions.
48 *
49 * Pm140 (rule 11.3): a cast should not be performed between a pointer type and an integral type
50 * The rule makes an exception for memory-mapped register accesses.
51 *
52 * Pm073 (rule 14.7): a function should have a single point of exit.
53 * Pm143 (rule 14.7): a function should have a single point of exit at the end of the function.
54 * Multiple returns are used for error handling.
55 */
56 #pragma diag_suppress=Pm073,Pm143
57 #endif /* __ICCARM__ */
58 
78  ADI_SPI_HANDLE hSPIDevice,
79  MEM_CFG_DESCRIPTOR_Type * pCONFIG
80 )
81 {
82  return(adf7030_1__XferConfig( hSPIDevice, pCONFIG, PHY_MEM_WRITE, false));
83 }
84 
102  ADI_SPI_HANDLE hSPIDevice,
103  MEM_CFG_DESCRIPTOR_Type * pCONFIG
104 )
105 {
106  return(adf7030_1__XferConfig( hSPIDevice, pCONFIG, PHY_MEM_READ, false));
107 }
108 
128  ADI_SPI_HANDLE hSPIDevice,
129  MEM_CFG_DESCRIPTOR_Type * pCONFIG
130 )
131 {
132  return(adf7030_1__XferConfig( hSPIDevice, pCONFIG, PHY_MEM_READ, true));
133 }
134 
157  ADI_SPI_HANDLE hSPIDevice,
158  MEM_CFG_DESCRIPTOR_Type * pCONFIG,
159  bool READ_nWRITE,
160  bool CHECK_ONLY
161 )
162 {
163  bool exit;
164  do{
165 
166  for(uint32_t i = 0; i < pCONFIG->nbBlock; i++)
167  {
168  /* Get Memory Block Address */
169  uint32_t PHYAddr = pCONFIG->BLOCKS[i].Addr;
170 
171  /* 8bits Mode SPI transfers mode by default */
172  if(pCONFIG->BLOCKS[i].WordXfer == 0)
173  {
175  int32_t PNTR_offset;
176 
177  /* Get good PNTRid from ADF7030_1_SPI_PNTR[] */
178  adf7030_1__SPI_FindMMapPointer( hSPIDevice, PHYAddr, &PNTR_id, &PNTR_offset);
179 
180  /* Setup pointer to Host start of data */
181  uint8_t * pHostMem;
182  pHostMem = (uint8_t *)pCONFIG->BLOCKS[i].pData;
183 
184  uint32_t size = pCONFIG->BLOCKS[i].Size;
185 
186  /* No valid PHY SPI pointer available, use 8bits access with no offset */
187  if(PNTR_id == 0)
188  {
189  /* Change the SPI custom pointer 0 */
190  if(adf7030_1__SPI_SetMMapCustomPntr0( hSPIDevice, PHYAddr ) != SUCCESS)
191  {
192  return FAILURE;
193  }
194 
195  if(CHECK_ONLY)
196  {
197  /* Read from radio PHY and compare to host */
198  if(adf7030_1__SPI_rd_cmp_byte_p_a( hSPIDevice, PNTR_CUSTOM0_ADDR, size, NULL, pHostMem) != SUCCESS)
199  {
200  return FAILURE;
201  }
202  }
203  else
204  {
205  /* Copy Host MEM memory block to PHY memory block via the SPI */
206  if(READ_nWRITE == true)
207  {
208  /* Read from radio PHY */
209  if(adf7030_1__SPI_rd_byte_p_a( hSPIDevice, PNTR_CUSTOM0_ADDR, size, pHostMem) != SUCCESS)
210  {
211  return FAILURE;
212  }
213  }else{
214  /* Write to radio PHY */
215  if(adf7030_1__SPI_wr_byte_p_a( hSPIDevice, PNTR_CUSTOM0_ADDR, size, pHostMem) != SUCCESS)
216  {
217  return FAILURE;
218  }
219  }
220  }
221  }
222  /* Valid PHY SPI pointer available, use 8bits access with pointer offset */
223  else
224  {
225  if(CHECK_ONLY)
226  {
227  /* Read from radio PHY and compare to host */
228  if(adf7030_1__SPI_rd_cmp_byte_b_a( hSPIDevice, PNTR_id, PNTR_offset, size, NULL, pHostMem) != SUCCESS)
229  {
230  return FAILURE;
231  }
232  }
233  else
234  {
235  /* Copy Host MEM memory block to PHY memory block via the SPI */
236  if(READ_nWRITE == true)
237  {
238  /* Read from radio PHY */
239  if(adf7030_1__SPI_rd_byte_b_a( hSPIDevice, PNTR_id, PNTR_offset, size, pHostMem) != SUCCESS)
240  {
241  return FAILURE;
242  }
243  }else{
244  /* Write to radio PHY */
245  if(adf7030_1__SPI_wr_byte_b_a( hSPIDevice, PNTR_id, PNTR_offset, size, pHostMem) != SUCCESS)
246  {
247  return FAILURE;
248  }
249  }
250  }
251  }
252  }
253  /* This block only support 32bits Mode SPI transfers, Let us just use block modes */
254  else
255  {
256  /* Setup pointer to Host start of data */
257  uint32_t * pHostMem;
258  pHostMem = (uint32_t *)pCONFIG->BLOCKS[i].pData;
259 
260  uint32_t size = pCONFIG->BLOCKS[i].Size >> 2;
261 
262  if(CHECK_ONLY)
263  {
264  /* Read from radio PHY and compare to host */
265  if(adf7030_1__SPI_rd_cmp_word_b_a( hSPIDevice, PHYAddr, size, NULL, pHostMem) != SUCCESS)
266  {
267  return FAILURE;
268  }
269  }
270  else
271  {
272  /* Copy Host MEM memory block to PHY memory block via the SPI */
273  if(READ_nWRITE == true)
274  {
275  /* Read from radio PHY */
276  if(adf7030_1__SPI_rd_word_b_a( hSPIDevice, PHYAddr, size, pHostMem) != SUCCESS)
277  {
278  return FAILURE;
279  }
280  }else{
281  /* Write to radio PHY */
282  if(adf7030_1__SPI_wr_word_b_a( hSPIDevice, PHYAddr, size, pHostMem) != SUCCESS)
283  {
284  return FAILURE;
285  }
286  }
287  }
288  }
289  }
290 
291  /* Check if nested MEM Configuration transfert is present */
292  if(pCONFIG->pNext)
293  {
294  /* Move pointer to MEM structure to the following one */
295  pCONFIG = pCONFIG->pNext;
296  exit = false;
297  }
298  else
299  {
300  exit = true;
301  }
302  }while(exit == false);
303 
304  return SUCCESS;
305 }
306 
328 /* */
330  ADI_SPI_HANDLE hSPIDevice,
331  MEM_DESCRIPTOR_Type * pMEM,
332  bool READ_nWRITE
333 )
334 {
335  bool exit;
336  do{
337 
338  if(!pMEM->XferMode)
339  {
340  /* Block Transfers Mode */
341 
342  uint32_t PHYAddr = pMEM->PhyAddr + pMEM->BlockXfer.Offset;
343 
345  int32_t PNTR_offset;
346 
347  /* Get good PNTRid from ADF7030_1_SPI_PNTR[] */
348  adf7030_1__SPI_FindMMapPointer( hSPIDevice, PHYAddr, &PNTR_id, &PNTR_offset);
349 
350  /* 32bits Mode SPI transfers */
351  if(!(PHYAddr & 3) && !(pMEM->BlockXfer.Size & 3))
352  {
353  /* Setup pointer to Host start of data */
354  uint32_t * pHostMem;
355  pHostMem = (uint32_t *)pMEM->pBuff + (pMEM->BlockXfer.Offset >> 2);
356 
357  /* Valid PHY SPI pointer available, use 32bits bloc pointer access */
358  if((PNTR_id) && !(PNTR_offset >> 2))
359  {
360  if(READ_nWRITE == true)
361  {
362  /* Read from radio PHY */
363  if(adf7030_1__SPI_rd_word_b_p( hSPIDevice, PNTR_id, pMEM->BlockXfer.Size >> 2, pHostMem) != SUCCESS)
364  {
365  return FAILURE;
366  }
367  }else{
368  /* Write to radio PHY */
369  if(adf7030_1__SPI_wr_word_b_p( hSPIDevice, PNTR_id, pMEM->BlockXfer.Size >> 2, pHostMem) != SUCCESS)
370  {
371  return FAILURE;
372  }
373  }
374  }
375  /* No valid PHY SPI pointer available, use 32bits bloc address access */
376  else
377  {
378  if(READ_nWRITE == true)
379  {
380  /* Read from radio PHY */
381  if(adf7030_1__SPI_rd_word_b_a( hSPIDevice, PHYAddr, pMEM->BlockXfer.Size >> 2, pHostMem) != SUCCESS)
382  {
383  return FAILURE;
384  }
385  }else{
386  /* Write to radio PHY */
387  if(adf7030_1__SPI_wr_word_b_a( hSPIDevice, PHYAddr, pMEM->BlockXfer.Size >> 2, pHostMem) != SUCCESS)
388  {
389  return FAILURE;
390  }
391  }
392  }
393  }
394  /* 8bits Mode SPI transfers */
395  else
396  {
397  /* Setup pointer to Host start of data */
398  uint8_t * pHostMem;
399  pHostMem = (uint8_t *)pMEM->pBuff + pMEM->BlockXfer.Offset;
400 
401  /* No valid PHY SPI pointer available, use 8bits access with no offset */
402  if(PNTR_id == 0)
403  {
404  /* Change the SPI custom pointer 0 */
405  if(adf7030_1__SPI_SetMMapCustomPntr0( hSPIDevice, PHYAddr ) != SUCCESS)
406  {
407  return FAILURE;
408  }
409 
410  /* Copy Host MEM memory block to PHY memory block via the SPI */
411  if(READ_nWRITE == true)
412  {
413  /* Read from radio PHY */
414  if(adf7030_1__SPI_rd_byte_p_a( hSPIDevice, PNTR_CUSTOM0_ADDR, pMEM->BlockXfer.Size, pHostMem) != SUCCESS)
415  {
416  return FAILURE;
417  }
418  }else{
419  /* Write to radio PHY */
420  if(adf7030_1__SPI_wr_byte_p_a( hSPIDevice, PNTR_CUSTOM0_ADDR, pMEM->BlockXfer.Size, pHostMem) != SUCCESS)
421  {
422  return FAILURE;
423  }
424  }
425  }
426  /* Valid PHY SPI pointer available, use 8bits access with pointer offset */
427  else
428  {
429  /* Copy Host MEM memory block to PHY memory block via the SPI */
430  if(READ_nWRITE == true)
431  {
432  /* Read from radio PHY */
433  if(adf7030_1__SPI_rd_byte_b_a( hSPIDevice, PNTR_id, PNTR_offset, pMEM->BlockXfer.Size, pHostMem) != SUCCESS)
434  {
435  return FAILURE;
436  }
437  }else{
438  /* Write to radio PHY */
439  if(adf7030_1__SPI_wr_byte_b_a( hSPIDevice, PNTR_id, PNTR_offset, pMEM->BlockXfer.Size, pHostMem) != SUCCESS)
440  {
441  return FAILURE;
442  }
443  }
444  }
445  }
446  }
447  else
448  {
449  /* Random Transfers Mode */
450 
451  }
452 
453 
454  /* Check if nested MEM transfert is present */
455  if(pMEM->pNextBloc)
456  {
457  /* Move pointer to MEM structure to the following one */
458  pMEM = pMEM->pNextBloc;
459  exit = false;
460  }
461  else
462  {
463  exit = true;
464  }
465 
466  }while(exit == false);
467 
468  return SUCCESS;
469 }
470 
471 
487  ADI_SPI_HANDLE hSPIDevice,
488  uint32_t Addr,
489  uint32_t Value
490 )
491 {
492  adf7030_1__SPI_SetBytes( hSPIDevice, Addr, Value, 4);
493 }
494 
508  ADI_SPI_HANDLE hSPIDevice,
509  uint32_t Addr
510 )
511 {
512  return(adf7030_1__SPI_GetBytes( hSPIDevice, Addr, 4));
513 }
514 
533  ADI_SPI_HANDLE hSPIDevice,
534  uint32_t Addr,
535  uint32_t Value
536 )
537 {
538  adf7030_1__SPI_SetBytes( hSPIDevice, Addr, (0xFFFFFF & Value), 3);
539 }
540 
557  ADI_SPI_HANDLE hSPIDevice,
558  uint32_t Addr
559 )
560 {
561  return((0xFFFFFF & adf7030_1__SPI_GetBytes( hSPIDevice, Addr, 3)));
562 }
563 
582  ADI_SPI_HANDLE hSPIDevice,
583  uint32_t Addr,
584  uint16_t Value
585 )
586 {
587  adf7030_1__SPI_SetBytes( hSPIDevice, Addr, Value, 2);
588 }
589 
606  ADI_SPI_HANDLE hSPIDevice,
607  uint32_t Addr
608 )
609 {
610  return((uint16_t)adf7030_1__SPI_GetBytes( hSPIDevice, Addr, 2));
611 }
612 
631  ADI_SPI_HANDLE hSPIDevice,
632  uint32_t Addr,
633  uint8_t Value
634 )
635 {
636  adf7030_1__SPI_SetBytes( hSPIDevice, Addr, Value, 1);
637 }
638 
655  ADI_SPI_HANDLE hSPIDevice,
656  uint32_t Addr
657 )
658 {
659  return((uint8_t)adf7030_1__SPI_GetBytes( hSPIDevice, Addr, 1));
660 }
661 
682  ADI_SPI_HANDLE hSPIDevice,
683  uint32_t Addr,
684  uint32_t Value,
685  uint32_t nbBytes
686 )
687 {
688  /* Get current SPI custom pntr 0 value */
689  int32_t AddrDiff = (int32_t)Addr - (int32_t)ADF7030_1_SPI_PNTR[PNTR_CUSTOM0_ADDR];
690 
691  uint8_t Offset;
692 
693  if((AddrDiff >= 0 ) && (AddrDiff < (255 + nbBytes)))
694  {
695  /* Here PNTR_CUSTOM0_ADDR is within range, just change the offset */
696  Offset = (uint8_t)AddrDiff;
697 
698  }else{
699  /* Here PNTR_CUSTOM0_ADDR is not within range, changing it so */
700 
701  /* Change Radio SPI pointer 0 address to Addr */
702  ADF7030_1_SPI_PNTR[PNTR_CUSTOM0_ADDR] = ((Addr >> 2) << 2);
703 
704  /* Update the Radio SPI pointer 0 */
705  adf7030_1__SPI_wr_word_b_p( hSPIDevice, PNTR_SETUP_ADDR, 1, &ADF7030_1_SPI_PNTR[PNTR_CUSTOM0_ADDR]);
706 
707  Offset = Addr & 0x03;
708  }
709 
710 
711  if((Offset == 0) && (nbBytes == 4))
712  {
713  /* Write the 32bit alligned data */
714  adf7030_1__SPI_wr_word_b_p( hSPIDevice, PNTR_CUSTOM0_ADDR, 1, &Value);
715  }else{
716  /* Write the nbBytes data */
717  adf7030_1__SPI_wr_byte_b_a( hSPIDevice, PNTR_CUSTOM0_ADDR, Offset, nbBytes, (uint8_t *)&Value);
718  }
719 }
720 
741  ADI_SPI_HANDLE hSPIDevice,
742  uint32_t Addr,
743  uint32_t nbBytes
744 )
745 {
746  /* Get current SPI custom pntr 0 value */
747  int32_t AddrDiff = (int32_t)Addr - (int32_t)ADF7030_1_SPI_PNTR[PNTR_CUSTOM0_ADDR];
748 
749  uint8_t Offset;
750 
751  if((AddrDiff >= 0 ) && (AddrDiff < (255 + nbBytes)))
752  {
753  /* Here PNTR_CUSTOM0_ADDR is within range, just change the offset */
754  Offset = (uint8_t)AddrDiff;
755 
756  }else{
757  /* Here PNTR_CUSTOM0_ADDR is not within range, changing it so */
758 
759  /* Change Radio SPI pointer 0 address to Addr */
760  ADF7030_1_SPI_PNTR[PNTR_CUSTOM0_ADDR] = ((Addr >> 2) << 2);
761 
762  /* Update the Radio SPI pointer 0 */
763  adf7030_1__SPI_wr_word_b_p( hSPIDevice, PNTR_SETUP_ADDR, 1, &ADF7030_1_SPI_PNTR[PNTR_CUSTOM0_ADDR]);
764 
765  Offset = Addr & 0x03;
766  }
767 
768  uint32_t RetVal;
769  if((Offset == 0) && (nbBytes == 4))
770  {
771  /* Read the 32bit alligned data */
772  adf7030_1__SPI_rd_word_b_p( hSPIDevice, PNTR_CUSTOM0_ADDR, 1, &RetVal);
773  }else{
774  /* Read the nbBytes data */
775  adf7030_1__SPI_rd_byte_b_a( hSPIDevice, PNTR_CUSTOM0_ADDR, Offset, nbBytes, (uint8_t *)&RetVal);
776  }
777 
778  return(RetVal);
779 }
780 
805  ADI_SPI_HANDLE hSPIDevice,
806  uint32_t Addr,
807  uint32_t Pos,
808  uint32_t Size,
809  uint32_t Val
810 )
811 {
812  /* Compute Bitfields parameters */
813  uint32_t fStartByte = Pos >> 3;
814  uint32_t fPos_fromStartByte = Pos - (fStartByte << 3);
815  uint32_t fLenBytes = ((Size - 1) >> 3) + 1;
816 
817  /* Read Bitfield vis SPI */
818  uint32_t fVal = adf7030_1__SPI_GetBytes( hSPIDevice, Addr + fStartByte, fLenBytes);
819 
820  /* Compute the Mask */
821  uint32_t fMsk = ((1 << Size) - 1) << fPos_fromStartByte;
822 
823  /* Bound Val to the Mask */
824  Val <<= fPos_fromStartByte;
825  Val &= fMsk;
826 
827  /* And SPI returned value with inverted Mask */
828  fVal &= (~fMsk);
829 
830  /* Or SPI returned value with Val*/
831  fVal |= Val;
832 
833  /* Write back Bitfield vis SPI */
834  adf7030_1__SPI_SetBytes( hSPIDevice, Addr + fStartByte, fVal, fLenBytes);
835 }
836 
837 
859  ADI_SPI_HANDLE hSPIDevice,
860  uint32_t Addr,
861  uint32_t Pos,
862  uint32_t Size
863 )
864 {
865  /* Compute Bitfields parameters */
866  uint32_t fStartByte = Pos >> 3;
867  uint32_t fPos_fromStartByte = Pos - (fStartByte << 3);
868  uint32_t fLenBytes = ((Size - 1) >> 3) + 1;
869 
870  /* Read Bitfield vis SPI */
871  uint32_t fVal = adf7030_1__SPI_GetBytes( hSPIDevice, Addr + fStartByte, fLenBytes);
872 
873  /* Compute the Mask */
874  uint32_t fMsk = ((1 << Size) - 1) << fPos_fromStartByte;
875 
876  /* And SPI returned value with Mask */
877  fVal &= fMsk;
878 
879  /* Shift right by fPos_fromStartByte */
880  fVal >>= fPos_fromStartByte;
881 
882  /* Return Bitfield Value */
883  return(fVal);
884 }
885 
886 //#define adf7030_1__SPI_GetField(field)
887 
888 
889 #endif /* _ADF7030_1__MEM_C_ */
890  /* End of group adf7030-1__mem PHY Memory Interface */ /* End of group adf7030-1 adf7030-1 Driver */
uint32_t adf7030_1__SPI_wr_byte_p_a(ADI_SPI_HANDLE hSPIDevice, ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE pntrID, uint32_t num_xfrs, uint8_t *pDataIn)
Write a number of byte(s) from Host to memory of the adf7030-1 starting at location pointed by "pntr"...
void adf7030_1__SPI_SetField(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr, uint32_t Pos, uint32_t Size, uint32_t Val)
Generic setting of a Radio PHY bitfield to a value via the SPI.
uint32_t adf7030_1__XferConfig(ADI_SPI_HANDLE hSPIDevice, MEM_CFG_DESCRIPTOR_Type *pCONFIG, bool READ_nWRITE, bool CHECK_ONLY)
Generic Configuration transfers function between Host and the Radio PHY.
void adf7030_1__SPI_SetMem8(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr, uint8_t Value)
Write a single 8bits memory location via the SPI.
uint32_t adf7030_1__SPI_rd_word_b_a(ADI_SPI_HANDLE hSPIDevice, uint32_t AddrIn, uint32_t num_xfrs, uint32_t *pDataOut)
Read a number of word(s) from the adf7030-1 to memory of Host Generic 32bits bloc address read from m...
void adf7030_1__SPI_SetMem24(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr, uint32_t Value)
Write a single 24bits memory location via the SPI.
uint32_t adf7030_1__SPI_GetBytes(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr, uint32_t nbBytes)
Read "nbBytes" memory location via the SPI.
uint16_t nbBlock
Total size of the configuration.
uint32_t adf7030_1__SPI_SetMMapCustomPntr0(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr)
Change the SPI Radio mmap custom pointers 0 location.
uint32_t adf7030_1__SPI_rd_byte_p_a(ADI_SPI_HANDLE hSPIDevice, ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE pntrID, uint32_t num_xfrs, uint8_t *pDataOut)
Read a number of bytes(s) from memory of the adf7030-1 to Host starting at location pointed by "pntr"...
uint32_t adf7030_1__SPI_GetField(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr, uint32_t Pos, uint32_t Size)
Generic readback of a bitfield value from the Radio PHY via the SPI.
uint8_t adf7030_1__SPI_GetMem8(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr)
Read a 8bits memory location via the SPI.
uint32_t adf7030_1__SPI_rd_cmp_word_b_a(ADI_SPI_HANDLE hSPIDevice, uint32_t AddrIn, uint32_t num_xfrs, uint32_t *pDataOut, uint32_t *pDataRef)
Read & Compare a number of word(s) from the adf7030-1 to memory of Host Generic 32bits bloc address r...
MEM_DESCRIPTOR_Type * pNextBloc
descriptor for random access
void adf7030_1__SPI_SetBytes(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr, uint32_t Value, uint32_t nbBytes)
Writes "nbBytes" memory location via the SPI.
DATA_BLOCK_DESCRIPTOR_Type BLOCKS[]
Pointer to the next configuration sequence if desired, else NULL.
uint32_t adf7030_1__SPI_Xfer_Mem(ADI_SPI_HANDLE hSPIDevice, MEM_DESCRIPTOR_Type *pMEM, bool READ_nWRITE)
Generic memory transfers function between Host shadow and the Radio PHY.
uint32_t adf7030_1__SPI_rd_cmp_byte_b_a(ADI_SPI_HANDLE hSPIDevice, ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE pntrID, uint32_t AddrIn, uint32_t num_xfrs, uint8_t *pDataOut, uint8_t *pDataRef)
Read & Compare a number of bytes(s) from memory of the adf7030-1 to Host starting at location pointed...
uint16_t adf7030_1__SPI_GetMem16(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr)
Read a 16bits memory location via the SPI.
void * pBuff
address of the memory bloc in the PHY memory space
uint32_t adf7030_1__SPI_rd_word_b_p(ADI_SPI_HANDLE hSPIDevice, ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE pntrID, uint32_t num_xfrs, uint32_t *pDataOut)
Read a number of word(s) from memory of the adf7030-1 to Host starting at location pointed by "pntr" ...
uint32_t adf7030_1__SPI_GetMem32(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr)
Read a single 32bits memory location via the SPI.
uint32_t PhyAddr
0->Block, 1->Random SPI transfer mode
const uint8_t * pData
Address of the memory bloc in the PHY memory space.
uint32_t adf7030_1__SPI_wr_word_b_p(ADI_SPI_HANDLE hSPIDevice, ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE pntrID, uint32_t num_xfrs, uint32_t *pDataIn)
Write a number of word(s) from Host to memory of the adf7030-1 starting at location pointed by "pntr"...
void adf7030_1__SPI_FindMMapPointer(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr, ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE *pPNTR_ID, int32_t *ByteOffset)
This function return the best Pointer id + offset for subsequent SPI transfert to the PHY "Addr" prov...
const uint32_t Addr
If !NULL, force 32bits SPI transfer.
uint32_t adf7030_1__SPI_GetMem24(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr)
Read a 24bits memory location via the SPI.
uint32_t adf7030_1__ReadConfig(ADI_SPI_HANDLE hSPIDevice, MEM_CFG_DESCRIPTOR_Type *pCONFIG)
Function call to read Configuration from Radio PHY.
void adf7030_1__SPI_SetMem16(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr, uint16_t Value)
Write a single 16bits memory location via the SPI.
ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE
uint16_t Offset
Byte size of the Block to transfer.
uint32_t adf7030_1__SPI_rd_byte_b_a(ADI_SPI_HANDLE hSPIDevice, ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE pntrID, uint32_t AddrIn, uint32_t num_xfrs, uint8_t *pDataOut)
Read a number of bytes(s) from memory of the adf7030-1 to Host starting at location pointed by "pntr"...
MEM_CFG_DESCRIPTOR_Type * pNext
Pointer to the configuration info structure in the host memory.
uint32_t adf7030_1__SPI_wr_word_b_a(ADI_SPI_HANDLE hSPIDevice, uint32_t AddrIn, uint32_t num_xfrs, uint32_t *pDataIn)
Write a number of word(s) from Host to memory of the adf7030-1 Generic 32bits bloc address write to m...
uint32_t adf7030_1__SPI_wr_byte_b_a(ADI_SPI_HANDLE hSPIDevice, ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE pntrID, uint32_t AddrIn, uint32_t num_xfrs, uint8_t *pDataIn)
Write a number of byte(s) from Host to memory of the adf7030-1 starting at location pointed by "pntr"...
uint8_t XferMode
0->8bits, 1->32bits SPI transfert mode, 2->8bits Only, 3->32bits only
void adf7030_1__SPI_SetMem32(ADI_SPI_HANDLE hSPIDevice, uint32_t Addr, uint32_t Value)
Write a single 32bits memory location via the SPI.
uint32_t adf7030_1__WriteConfig(ADI_SPI_HANDLE hSPIDevice, MEM_CFG_DESCRIPTOR_Type *pCONFIG)
Function call to write Configuration to Radio PHY.
uint32_t adf7030_1__SPI_rd_cmp_byte_p_a(ADI_SPI_HANDLE hSPIDevice, ADI_ADF7030_1_RADIO_SPI_PNTR_TYPE pntrID, uint32_t num_xfrs, uint8_t *pDataOut, uint8_t *pDataRef)
Read & Compare a number of bytes(s) from memory of the adf7030-1 to Host starting at location pointed...
BLOCK_XFER_DESCRIPTOR_Type BlockXfer
pointer to the initial value of the shadow memory bloc in the host memory space
uint32_t adf7030_1__VerifyConfig(ADI_SPI_HANDLE hSPIDevice, MEM_CFG_DESCRIPTOR_Type *pCONFIG)
Function call to verify the integrity of the patch.